The disclosed embodiments of the present invention relate to managing power consumption of a memory system, and more particularly, to a multi-channel memory system using asymmetric channel frequency scaling and related power management method.
With the advance of the semiconductor technology, more circuits can be integrated into a single chip. Hence, a system on chip (SoC) has many internal circuit blocks that need to access the same external memory, and therefore requires a higher memory bandwidth. A multi-channel memory may be used to meet the memory bandwidth requirement. Further, power consumption is a primary concern in certain electronic devices such as mobile devices. Since the mobile device is powered by a battery device with limited capacity, the mobile device requires low power for normal operations. However, one typical memory controller design controls all channels of the multi-channel memory to operate at the same clock frequency, regardless of the memory loading. As a result, all channels of the multi-channel memory that operate at the same clock frequency will waste power. In a worst case, the memory system power consumption may be a significant portion of the total power consumption of the mobile device under normal operations.
Thus, there is a need for an innovative channel frequency scaling design for a multi-channel memory that can reduce the memory system power consumption while meeting the required memory bandwidth requirement.